DocumentCode
2599403
Title
A 3, 3V 12bits rail-to-rail ADC SAR for neuronal implant
Author
Regis, G. ; Boutemeur, M. ; Condemine, C. ; Robinet, S. ; Audebert, P.
Author_Institution
MIND Lab., Archamps, France
fYear
2010
fDate
20-23 June 2010
Firstpage
5
Lastpage
8
Abstract
This paper presents the development of a low-power rail-to-rail SAR-ADC to be used in a medical implants. The first part discusses the principle schematic and the requirements for the neuronal implant application. Additionally, a full description of each part of this ADC SAR will be given. And finally the last part presents measurement results of a fabricated test chip in 0.35μM CMOS technology, with 86μW of power consumption, 12bits of resolution, and a speed of 24Ks/S.
Keywords
CMOS integrated circuits; analogue-digital conversion; low-power electronics; prosthetics; CMOS technology; low-power rail-to-rail SAR-ADC; medical implants; neuronal implant; power 86 muW; rail-to-rail ADC SAR; size 0.35 mum; voltage 3 V; Application specific integrated circuits; Capacitors; Implants; Latches; Noise; Power demand; Preamplifiers;
fLanguage
English
Publisher
ieee
Conference_Titel
NEWCAS Conference (NEWCAS), 2010 8th IEEE International
Conference_Location
Montreal, QC
Print_ISBN
978-1-4244-6806-5
Electronic_ISBN
978-1-4244-6804-1
Type
conf
DOI
10.1109/NEWCAS.2010.5603780
Filename
5603780
Link To Document