DocumentCode :
2599597
Title :
VLSI design of on-line add/multiply algorithms
Author :
Skaf, Ali ; Guyot, Alain
fYear :
1993
fDate :
3-6 Oct 1993
Firstpage :
264
Lastpage :
267
Abstract :
We present some VLSI structures suitable for online arithmetic embedded algorithms using a radix-two fixed point signed digit system. As an application, we present online add/multiply architectures allowing the obtention of a zero-delay operator. An example of a circuit for online computation of several real functions using polynomials is also discussed
Keywords :
Algorithm design and analysis; Arithmetic; Circuits; Computer architecture; Delay; Encoding; Laboratories; Logic; Polynomials; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1993. ICCD '93. Proceedings., 1993 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-4230-0
Type :
conf
DOI :
10.1109/ICCD.1993.393369
Filename :
393369
Link To Document :
بازگشت