A partial scan cost estimation method at the system level

Recent progress of data path synthesis has manifested the need to consider design for testability during, not after, the synthesis process. Motivated by the above requirement, the paper describes a partial scan cost estimation scheme for random testing using module level primitives. Starting from interpreting testability at the register transfer level, a model is developed for estimating the required partial scan configuration under a user specified testing time. A mixed integer programming formulation is then presented to derive the location and amount of scan needed. Experimental results have shown the same level of fault coverage as that of the full scan path under the given test time constraint