Reliability Screening Procedures for Integrated Circuits

This paper discusses reliability screening techniques for integrated circuits which can be used in conjunction with a standard process normally producing material suitable for less stringent reliability applications. Devices can be selected by subjecting this material to additional conditioning and selective procedures at the following levels: I. Precapsulation Lot Acceptance for Metal Adherece and Bond Integrity II. 100% Die and Package Inspections III. Post Capsulation Conditioning and Screening The information obtained from accelerated stress tests, failure analysis, physics of failure studies and data analysis is used to demonstrate the effectiveness of new screening techniques. Factors relating to the cost of screening are discussed. Some of the failure mechanisms known to exist in integrated circuits did not occur during the stress program; those found resulted from stresses conducted above the normal device ratings. The screening techniques and procedures should therefore be incorporated into specifications after careful consideration is given to the techniques of fabrication, stress limitations, and application requirements of each device type.