DocumentCode
2601165
Title
Fast design approach for implementing the approximate squaring function
Author
Sheu, Ming-hwa ; Lin, Su-Hon
Author_Institution
Dept. of Electron. Eng., Nat. Yunlin Univ. of Sci. & Technol., Taiwan
Volume
2
fYear
2002
fDate
2002
Firstpage
25
Abstract
The paper presents a novel method to design the approximate squaring functions. A weighted table is used to derive the Boolean expression for the approximate squaring function which possesses the advantages of less circuit cost, lower power dissipation and shorter critical delay. From the result comparison, the design of 7-bit approximate squaring function only requires 144 MOS transistors which is much less than that required by the other existing approaches. The corresponding MRE (maximum relative error) and ARE (average relative error) are only 16.95% and 5.11 % respectively.
Keywords
combinational circuits; delays; digital arithmetic; high-speed integrated circuits; low-power electronics; 7 bit; Boolean expression; approximate squaring function; average relative error; circuit implementations; critical delay; high-speed squaring operations; maximum relative error; power dissipation; weighted table; Artificial intelligence; Circuits; Cost function; Delay; Design methodology; Logic design; MOSFETs; Power dissipation; Process design; Viterbi algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. APCCAS '02. 2002 Asia-Pacific Conference on
Print_ISBN
0-7803-7690-0
Type
conf
DOI
10.1109/APCCAS.2002.1115101
Filename
1115101
Link To Document