Title :
Fast modular multiplication using Booth recoding based on signed-digit number arithmetic
Author :
Wei, Shugang ; Chen, Shuangching ; Shimizu, Kensuke
Author_Institution :
Dept. of Comput. Sci., Gunma Univ., Japan
Abstract :
Proposes a new algorithm of serial modular multiplication based on signed-digit (SD) number system using Booth recoding method. By introducing a p-digit radix-two SD number system, a modular addition is easily implemented by using one or two SD adders, so that no carry propagation will arise during the additions. A modular multiplication can be performed by repeating the modular addition with modular partial products. In order to implement a high speed modular multiplication, a Booth recoding method is used to reduce the partial products to be added for the modular multiplication. We also give a pipeline architecture with two modular SD adders to realize a faster modular multiplication. The design result by using VHDL shows that a fast modular multiplier can be implemented based on the presented method.
Keywords :
adders; multiplying circuits; pipeline arithmetic; residue number systems; Booth recoding; adders; modular multiplication; p-digit radix-two SD number system; pipeline architecture; signed-digit number arithmetic; Adders; Circuits; Computer science; Digital arithmetic; Digital signal processing; Hardware design languages; Pipelines; Public key cryptography; Registers; Signal processing algorithms;
Conference_Titel :
Circuits and Systems, 2002. APCCAS '02. 2002 Asia-Pacific Conference on
Print_ISBN :
0-7803-7690-0
DOI :
10.1109/APCCAS.2002.1115104