FPGA based hardware architecture for HIT/DLR hand

In this paper, FPGA (field programmable gate array) based hardware architecture for the HIT/DLR hand has been investigated. With the FPGAs for lower level control and DSP (digital signal processor) for higher level control, the whole hardware is very intelligent. By using the high capacity of FPGAs, the additional hardware such as communication controller and PWM generators, can be implemented in a single chip and the hardware system is more flexible and compact. In each finger there is an FPGA for data collection, brushless DC motors control and communication with palm´s FPGA by point-to-point serial communication (PPSeCo). The kernel of the hardware system is a PCI-based high speed floating-point DSP for data processing, and FPGA for high-speed (up to 25Mbps) real-time serial communication with the palm´s FPGA. There needs only 4 cables for the data transmission and the sampling cycle for each sensor is only 200 μs. This paper presents the basic ideas behind the HIT/DLR hand´s hard- and software architecture adapted to new needs in data processing.