Title :
Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
Abstract :
The following topics were dealt with: defect avoidance; yield prediction; reliability enhancement; layout driven test; process data analysis; fault diagnosis; fault tolerant structures; circuit synthesis; and fault-tolerance approaches
Keywords :
VLSI; built-in self test; circuit CAD; fault diagnosis; fault tolerant computing; integrated circuit design; integrated circuit reliability; integrated circuit testing; integrated circuit yield; logic CAD; network routing; circuit synthesis; defect avoidance; fault diagnosis; fault tolerant structures; layout driven test; process data analysis; reliability enhancement; self-checking designs; yield prediction;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 1996. Proceedings., 1996 IEEE International Symposium on
Conference_Location :
Boston, MA, USA
Print_ISBN :
0-8186-7545-4
DOI :
10.1109/DFTVS.1996.571979
