DocumentCode
2601841
Title
Synchronized state in networks of digital phase-locked loops
Author
Akré, J.M. ; Juillard, J. ; Galayko, D. ; Colinet, E.
Author_Institution
SSE, SUPELEC, Gif-sur-Yvette, France
fYear
2010
fDate
20-23 June 2010
Firstpage
89
Lastpage
92
Abstract
Clock distribution networks of synchronized oscillators are an alternative approach to classical tree-like clock distribution methods. Each node of the network may consist of a phase-locked loop (PLL) trying to match the phase of its neighbors. Then a network of independent oscillators takes the place of the centralized clock source, providing separate clock signals to the physically distant parts of the system. In the discrete case, the digital filter is necessarily operated asynchronously: each operation is triggered by a rising edge of the locally-generated clock, the frequency and phase of which vary as the whole system tries to synchronize. The locking behavior, the synchronous state and the stability conditions of such a system are analyzed. Similarly, the synchronization of an autonomous network of two self-sampled PLLs is studied. Surprisingly, its analysis is much simpler than that of the single PLL.
Keywords
digital filters; digital phase locked loops; integrated circuit design; large scale integration; phase locked oscillators; synchronisation; system-on-chip; asynchronous operation; autonomous network synchronization; clock distribution networks; digital filter; digital phase-locked loop networks; large scale synchronous system-on-chip; locally-generated clock; self-sampled PLL; synchronized oscillators; synchronized state; system stability; Clocks; Convergence; Lead; Linear systems; Oscillators; Phase locked loops; Synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
NEWCAS Conference (NEWCAS), 2010 8th IEEE International
Conference_Location
Montreal, QC
Print_ISBN
978-1-4244-6806-5
Electronic_ISBN
978-1-4244-6804-1
Type
conf
DOI
10.1109/NEWCAS.2010.5603916
Filename
5603916
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