DocumentCode :
2602210
Title :
A simple fault-tolerant digital voter circuit in TMR nanoarchitectures
Author :
Ban, Tian ; De Barros Naviner, Lirida Alves
Author_Institution :
Inst. TELECOM, TELECOM-ParisTech, Paris, France
fYear :
2010
fDate :
20-23 June 2010
Firstpage :
269
Lastpage :
272
Abstract :
Nanoelectronic systems are now more and more prone to faults and defects, permanent or transient. Redundancy techniques are implemented widely to increase the reliability, especially the TMR - Triple Modular Redundancy. However, many researchers assume that the voter is perfect and this may not be true. This paper proposes a simple but effective fault-tolerant voter circuit which is more reliable and less expensive. Experimental results demonstrate its improvement over the former TMR structures.
Keywords :
digital integrated circuits; fault tolerance; nanoelectronics; redundancy; TMR nanoarchitecture; fault tolerant digital voter circuit; nanoelectronic system; redundancy technique; triple modular redundancy; Circuit faults; Fault tolerant systems; Integrated circuit reliability; Redundancy; Tunneling magnetoresistance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
NEWCAS Conference (NEWCAS), 2010 8th IEEE International
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4244-6806-5
Electronic_ISBN :
978-1-4244-6804-1
Type :
conf
DOI :
10.1109/NEWCAS.2010.5603933
Filename :
5603933
Link To Document :
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