DocumentCode :
2602254
Title :
A Class of Byte Error Control Codes for Memory Systems - Sbec-(sb+s)ed Codes
Author :
Hamada, Mitsuru ; Fujiwara, Eiji
Author_Institution :
Tokyo Institute of Technology, Japan
fYear :
1993
fDate :
17-22 Jan 1993
Firstpage :
244
Lastpage :
244
Keywords :
Computer errors; Computer science; Error correction; Error correction codes; Hamming weight; Linear code; Parity check codes; Protection; Semiconductor memory; Vectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Theory, 1993. Proceedings. 1993 IEEE International Symposium on
Print_ISBN :
0-7803-0878-6
Type :
conf
DOI :
10.1109/ISIT.1993.748558
Filename :
748558
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2602254
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