DocumentCode :
2602289
Title :
Study of Local Trapping and STI Edge Effects on Charge-Trapping NAND Flash
Author :
Lue, Hang-Ting ; Hsu, Tzu-Hsuan ; Wang, Szu-Yu ; Hsiao, Yi-Hsuan ; Lai, Erh-Kun ; Yang, Ling-Wu ; Yang, Tahone ; Chen, Kuang-Chao ; Hsieh, Kuang-Yeu ; Liu, Rich ; Lu, Chih-Yuan
Author_Institution :
Macronix Int. Co. Ltd, Hsinchu
fYear :
2007
fDate :
10-12 Dec. 2007
Firstpage :
161
Lastpage :
164
Abstract :
Unlike the floating gate Flash device, charge-trapping (CT) devices store charges locally and are thus profoundly affected by non-uniform injection effect. The characteristics of a CT device are dominated by the local minimum-Vt region along the channel width. We have analyzed various STI structures including raised-STI, recessed-STI, and near-planar structures, and found that the program/erase characteristics are strongly impacted by the STI corner geometry due to local field enhancement (FE) and non-uniform injection effects. Moreover, both gm and S.S. vary during program/erase and thus increase programming/erasing complexity. The read disturb, program disturb, and retention characteristics are examined in detail. These conclusions apply to all CT devices.
Keywords :
NAND circuits; flash memories; NAND flash; STI edge effects; charge trapping; field enhancement; floating gate Flash device; local trapping; near planar structures; non uniform injection effect; recessed STI; Capacitors; Electron traps; FinFETs; Geometry; Iron; Linear programming; Nonvolatile memory; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2007. IEDM 2007. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
978-1-4244-1507-6
Electronic_ISBN :
978-1-4244-1508-3
Type :
conf
DOI :
10.1109/IEDM.2007.4418891
Filename :
4418891
Link To Document :
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