A high PSRR fully-MOSFET voltage reference with virtually diode-connected MOS transistors

This paper presents a voltage reference that utilizes the virtually diode-connected MOS transistors, biased in the weak-inversion region. The proposed architecture increases the gain of the feedback loop that consequently reduces the system sensitivity, and hence improves the PSRR. The circuit is designed and simulated in a standard 0.18 μm CMOS technology. The simulation results in HSPICE indicate successful operation of the circuit as follows: the PSRR at DC frequency is 94 dB and for the temperature range from -55°C to 125°C, the variation of the output reference voltage is less than 83 ppm/ °C.