• DocumentCode
    2602658
  • Title

    A charge-pump with a high output swing for PLL and CDR applications

  • Author

    Jalali, Mohammad Sadegh ; Bakhtiar, Alireza Sharif ; Mirabbasi, Shahriar

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of British Columbia, Vancouver, BC, Canada
  • fYear
    2010
  • fDate
    20-23 June 2010
  • Firstpage
    297
  • Lastpage
    300
  • Abstract
    In this paper, a technique to improve the output swing of the charge pump (CP) block is introduced. CPs are one of the important building blocks of phase-locked loops (PLLs) and PLL-based clock and data recovery (CDR) systems. The proposed feedback-based approach ensures that the currents of the two current sources in the CP maintain their values over an extended range of the charge-pump output voltage. This current stabilization is achieved by adjusting the control voltage of the charge pump current sources. A proof-of-concept charge pump is designed and simulated in a 0.13 μm CMOS process and achieves an output swing of 1.16 V while operating from a 1.2-V supply. The power overhead of the added feedback loop is 3%. The designed charge pump is also used in a complete phase-locked loop circuit to confirm its operation and effectiveness.
  • Keywords
    CMOS integrated circuits; charge pump circuits; clock and data recovery circuits; phase locked loops; CMOS process; charge-pump output voltage; clock and data recovery; control voltage; current stabilization; feedback loop; phase-locked loops; power overhead; size 0.13 mum; voltage 1.16 V; voltage 1.2 V; Capacitors; Charge pumps; Clocks; Detectors; Partial discharges; Phase locked loops; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    NEWCAS Conference (NEWCAS), 2010 8th IEEE International
  • Conference_Location
    Montreal, QC
  • Print_ISBN
    978-1-4244-6806-5
  • Electronic_ISBN
    978-1-4244-6804-1
  • Type

    conf

  • DOI
    10.1109/NEWCAS.2010.5603953
  • Filename
    5603953