DocumentCode :
2602698
Title :
A vector processor for software turbo decoding
Author :
Manjikian, Naraig ; Roth, Jonathan
Author_Institution :
Dept. of Electr. & Comput. Eng., Queen´´s Univ., Kingston, ON, Canada
fYear :
2010
fDate :
20-23 June 2010
Firstpage :
309
Lastpage :
312
Abstract :
Software turbo decoding has data parallelism that can be exploited with vector processing. This paper assesses the potential for vector processing for software turbo decoding using scaled integers, outlines requirements for vector instruction extensions, and describes an initial implementation in programmable logic to support vector processing for this application. Results are provided on resource utilization, and also on functionality with detailed timing simulation output.
Keywords :
parallel processing; programmable logic devices; software radio; support vector machines; turbo codes; vector processor systems; data parallelism; programmable logic; software turbo decoding; support vector processing; vector processor; Computer architecture; Decoding; Pipeline processing; Pipelines; Registers; Software;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
NEWCAS Conference (NEWCAS), 2010 8th IEEE International
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4244-6806-5
Electronic_ISBN :
978-1-4244-6804-1
Type :
conf
DOI :
10.1109/NEWCAS.2010.5603955
Filename :
5603955
Link To Document :
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