DocumentCode
2602917
Title
A Procedure for the Evaluation and Failure Analysis of M.O.S. Memory Circuits using the Scanning Electron Microscope in Potential Contrast Mode
Author
Behera, S.K. ; Speer, D.P.
Author_Institution
Microsystems International Limited, P.O. Box 3529, Station C, Ottawa, Ontario, Canada
fYear
1972
fDate
26390
Firstpage
5
Lastpage
11
Abstract
Methods of evaluation of M.O.S. memories with the S.E.M. in voltage contrast mode with emphasis on surface potential measurement techniques were discussed. An HF 1101 - 256 bit RAM was used as the test vehicle and techniques for threshold voltage measurements on any M.O.S. transistor in the circuit was established. Voltage contrast images of patterns written into the memory and a stroboscopic method of analysing the device under dynamic conditions were reported.
Keywords
Circuit testing; Failure analysis; Hafnium; Measurement techniques; Random access memory; Read-write memory; Scanning electron microscopy; Threshold voltage; Vehicles; Voltage measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 1972. 10th Annual
Conference_Location
Las Vegas, NV, USA
ISSN
0735-0791
Type
conf
DOI
10.1109/IRPS.1972.362521
Filename
4207893
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