DocumentCode :
2602931
Title :
Study on High Performance (110) PFETs with Embedded SiGe
Author :
Okamoto, S. ; Miyashita, K. ; Yasutake, N. ; Okada, T. ; Itokawa, H. ; Mizushima, I. ; Azuma, A. ; Yoshimura, H. ; Nakayama, T.
Author_Institution :
Semicond. Co.-Toshiba Corp., Yokohama
fYear :
2007
fDate :
10-12 Dec. 2007
Firstpage :
277
Lastpage :
280
Abstract :
The effects of inversion-layer capacitance and stress-induced mobility at short channel region (Lg =35 nm) on (100) and (110) pFETs are investigated. 64 % mobility enhancement at Eeff = 1.1 MV/cm and 0.15 nm thinner inversion-layer capacitance at Eox = 4.5 MV/cm are obtained for (110) embedded SiGe (eSiGe) pFETs, compared to (100) eSiGe pFETs. Calculated results suggest that (110) eSiGe pFETs will gain additional 63% higher mobility with 1 GPa uniaxial stress by controlling surface roughness scattering at SiO2/Si(110) interface.
Keywords :
field effect transistors; silicon compounds; surface roughness; PFET; field effect transistors; inversion-layer capacitance; mobility enhancement; silicon; surface roughness scattering; uniaxial stress; Boron; Capacitance; Germanium silicon alloys; Large scale integration; Research and development; Rough surfaces; Scattering; Silicon germanium; Stress; Surface roughness;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2007. IEDM 2007. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
978-1-4244-1507-6
Electronic_ISBN :
978-1-4244-1508-3
Type :
conf
DOI :
10.1109/IEDM.2007.4418922
Filename :
4418922
Link To Document :
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