Title :
Extreme High-Performance n- and p-MOSFETs Boosted by Dual-Metal/High-k Gate Damascene Process using Top-Cut Dual Stress Liners on (100) Substrates
Author :
Mayuzumi, S. ; Wang, J. ; Yamakawa, S. ; Tateshita, Y. ; Hirano, T. ; Nakata, M. ; Yamaguchi, S. ; Yamamoto, Y. ; Miyanami, Y. ; Oshiyama, I. ; Tanaka, K. ; Tai, K. ; Ogawa, K. ; Kugimiya, K. ; Nagahama, Y. ; Hagimoto, Y. ; Yamamoto, R. ; Kanda, S. ; Naga
Author_Institution :
SONY Corp. Atsugi Tec, Atsugi
Abstract :
Extreme high-performance n- and pFETs are achieved as 1300 and 1000 uA/um at Ioff = 100 nA/um and Vdd = 1.0 V, respectively, by applying newly proposed booster technologies. The combination of top-cut dual-stress liners and damascene gate remarkably enhances channel stress especially for shorter gate lengths. High-Ion pFETs with compressive stress liners and embedded SiGe source/drain are performed by using ALD-TiN/HfO2 damascene gate stacks with Tinv = 1.4 nm on (100) substrates. On the other hand, nFETs with tensile stress liners are obtained by using HfSix/HfO2 damascene gate stacks with Tinv =1.4 nm.
Keywords :
Ge-Si alloys; MOSFET; carrier mobility; hafnium compounds; high-k dielectric thin films; stress analysis; work function; HfSix-HfO2; Si-Ge; Tinv scaling; booster technologies; channel stress enhancement; compressive stress liners; dual-metal-high-k gate damascene process; embedded source-drain; gate-leakage-current reduction; high-ion pFET; high-performance n-MOSFET; mobility simulations; p-MOSFET; tensile stress liners; top-cut dual stress liners; voltage 1 V; Compressive stress; Electron mobility; Germanium silicon alloys; Hafnium oxide; High K dielectric materials; High-K gate dielectrics; MOSFET circuits; Silicon compounds; Silicon germanium; Tensile stress;
Conference_Titel :
Electron Devices Meeting, 2007. IEDM 2007. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
978-1-4244-1507-6
Electronic_ISBN :
978-1-4244-1508-3
DOI :
10.1109/IEDM.2007.4418926
