DocumentCode :
2603220
Title :
Square interconnection network for data permutation
Author :
Kokosinski, Zbigniew
Author_Institution :
Inst. of Control. Eng., Cracow Univ. of Technol., Krakow, Poland
fYear :
2002
fDate :
2002
Firstpage :
44
Lastpage :
46
Abstract :
In this paper a square cellular network for data permutation in a SIMD model is described. It has n2/4 2-permuters only, and realizes an arbitrary permutation pattern in two passes. For this network a programming algorithm is provided with O(n) sequential time complexity. Due to its regular cellular structure the square network is suitable for VLSI implementation.
Keywords :
VLSI; computational complexity; multiprocessing systems; multiprocessor interconnection networks; parallel algorithms; parallel architectures; SIMD model; VLSI; arbitrary permutation pattern; data permutation; multiprocessor architectures; regular cellular structure; sequential time complexity; square cellular network; square interconnection network; Cellular networks; Computer architecture; Control engineering; Hardware; Intelligent networks; Multiprocessor interconnection networks; Propagation delay; Registers; Samarium; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Computing in Electrical Engineering, 2002. PARELEC '02. Proceedings. International Conference on
Print_ISBN :
0-7695-1730-7
Type :
conf
DOI :
10.1109/PCEE.2002.1115195
Filename :
1115195
Link To Document :
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