DocumentCode :
2603313
Title :
Accuracy-improved through-silicon-via model using conformal mapping technique
Author :
Cheng, Tai-Yu ; Wang, Chuen-De ; Chiou, Yih-Peng ; Wu, Tzong-Lin
Author_Institution :
Dept. of Electr. Eng. & Grad. Inst. of Commun. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2011
fDate :
23-26 Oct. 2011
Firstpage :
189
Lastpage :
192
Abstract :
In this paper, the effects of slow wave and dielectric quasi-TEM modes in through-silicon via (TSV) are analyzed by using the currently used TSV model. By the E-field plot, if pitch to-diameter ratio is small in TSV structure, it is found out that some electrical behaviour of the TSVs is not well characterized by conventional model. This paper proposes a general and analytic model for the electrical modeling of through-silicon via (TSV) based on the conformal mapping method to modify the conventional model in admittance (CG) parts. With the improved model, the electrical performance of the modified model agrees very well with full-wave simulation up to 40GHz for small normalized pitch TSV.
Keywords :
integrated circuit interconnections; integrated circuit modelling; conformal mapping technique; dielectric quasi-TEM modes; electrical modeling; frequency 40 GHz; pitch to-diameter ratio; slow wave modes; through-silicon-via model; Analytical models; Dielectrics; Integrated circuit modeling; Silicon; Silicon compounds; Substrates; Through-silicon vias;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2011 IEEE 20th Conference on
Conference_Location :
San Jose, CA
ISSN :
pending
Print_ISBN :
978-1-4244-9398-2
Electronic_ISBN :
pending
Type :
conf
DOI :
10.1109/EPEPS.2011.6100223
Filename :
6100223
Link To Document :
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