Title :
On the behaviors of multi-island structure for single-electron threshold logic circuits
Author :
Bharkhada, Paresh ; Chen, Chunhong
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Windsor, Windsor, ON
Abstract :
This paper investigates the behaviors of multi-island structure as an alternative redundancy scheme for single-electron tunneling (SET) based digital circuits. In particular, we focus on an SET logic gate (2-input NAND gate) to explore the role of this structure in improving the immunity against random background charges. Also discussed are the parameter selection with multi-island structure, and the difference between this structure and the existing redundancy strategy. Experiments using SIMON simulator show the advantages of the proposed structure.
Keywords :
NAND circuits; logic gates; nanoelectronics; single electron devices; 2-input NAND gate; SET logic gate; SIMON simulator; multiisland structure; single-electron threshold logic circuits; single-electron tunneling based digital circuits; Circuit simulation; Digital circuits; Logic circuits; Logic functions; Logic gates; Nanoscale devices; Nanotechnology; Power dissipation; Redundancy; Tunneling;
Conference_Titel :
Nanotechnology, 2007. IEEE-NANO 2007. 7th IEEE Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-0607-4
Electronic_ISBN :
978-1-4244-0608-1
DOI :
10.1109/NANO.2007.4601142
