Title :
Proceedings VHDL International Users´ Forum. Fall Conference
Abstract :
The following topics were dealt with: verification; performance modelling; object-oriented VHDL; synthesis; system-level modelling; model generation and metrics; FPGAs; legacy electronics; the RASSP model library; and test benches and reliability analysis
Keywords :
field programmable gate arrays; formal verification; hardware description languages; integrated circuit reliability; logic design; performance evaluation; software prototyping; FPGAs; RASSP model library; VHDL; legacy electronics; metrics; model generation; object-oriented language; performance modelling; rapid systems prototyping; reliability analysis; synthesis; system-level modelling; test benches; verification;
Conference_Titel :
VHDL International Users' Forum, 1997. Proceedings
Conference_Location :
Arlington, VA, USA
Print_ISBN :
0-8186-8180-2
DOI :
10.1109/VIUF.1997.623922
