• DocumentCode
    2604061
  • Title

    Techniques for optimization of net algorithms

  • Author

    Prihozhy, Anatoly ; Mlynek, Daniel ; Solomennik, Michail ; Mattavelli, Marco

  • Author_Institution
    Signal Process. Lab., Ecole Polytech. Fed. de Lausanne, Switzerland
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    211
  • Lastpage
    216
  • Abstract
    In this paper, techniques for optimization of net algorithms describing parallel asynchronous computations and derived from cycling and branching behavioral descriptions are presented. The parallelization level of the algorithms is defined by a set of parallel operator pairs. The optimization techniques cover the two key steps of parallelization flow: the generation of an optimal initial set of parallel operator pairs to meet the constraints on the execution time or implementation cost, and the generation of the final set of pairs to solve the net algorithm existence problem. The quality of the proposed techniques is evaluated by experimental results. The techniques based on the minimization of the net algorithm critical paths estimated using the maximal weight cliques of the sequential and parallel operator graphs constitute the most efficient approach to the generation of the initial and final sets of parallel operator pairs.
  • Keywords
    critical path analysis; graph theory; optimisation; parallel algorithms; scheduling; algorithm parallelization; behavioral description; branching; critical path estimation; cycling; execution time; experimental results; implementation cost; minimization; net algorithm optimization; parallel asynchronous computations; parallel operator graphs; parallel operator pairs; scheduling; sequential operator graphs; Concurrent computing; Constraint optimization; Cost function; Distributed computing; Dynamic scheduling; Information technology; Laboratories; Processor scheduling; Scheduling algorithm; Signal processing algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Computing in Electrical Engineering, 2002. PARELEC '02. Proceedings. International Conference on
  • Print_ISBN
    0-7695-1730-7
  • Type

    conf

  • DOI
    10.1109/PCEE.2002.1115242
  • Filename
    1115242