DocumentCode :
2604075
Title :
A very low voltage low power CMOS Low Noise Amplifier with forward body bias
Author :
Aya, Mabrouki ; Thierry, Taris ; Yann, Deval ; Jean-Baptiste, Begueret
fYear :
2010
fDate :
20-23 June 2010
Firstpage :
341
Lastpage :
344
Abstract :
In this paper a very low voltage low power CMOS Low Noise Amplifier (LNA) suitable for ultra low power applications is presented. A new design methodology for noise and power consumption optimization is described. By using forward body bias (FBB), the proposed LNA, implemented in a 0.13μm CMOS process, can operate at 0.5V supply voltage, at 2.4GHz. Post layout simulation results show that it achieves 9.6dB power gain, 2.55dB noise figure (NF), and -6.2dBm input third order intercept point (IIP3), while drawing 0.88mA bias current.
Keywords :
CMOS integrated circuits; integrated circuit layout; low noise amplifiers; low-power electronics; CMOS process; FBB; LNA; bias current; current 0.88 mA; design methodology; forward body bias; frequency 2.4 GHz; gain 9.6 dB; input third order intercept point; low voltage low power CMOS low noise amplifier; noise figure; noise figure 2.55 dB; post layout simulation; power consumption optimization; power gain; size 0.13 mum; supply voltage; ultra low power applications; voltage 0.5 V; CMOS integrated circuits; Fingers; Low voltage; Noise; Noise figure; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
NEWCAS Conference (NEWCAS), 2010 8th IEEE International
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4244-6806-5
Electronic_ISBN :
978-1-4244-6804-1
Type :
conf
DOI :
10.1109/NEWCAS.2010.5604022
Filename :
5604022
Link To Document :
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