DocumentCode
2604097
Title
Copper Wiring Encapsulation with Ultra-thin Barriers to Enhance Wiring and Dielectric Reliabilities for 32-nm Nodes and Beyond
Author
Kudo, H. ; Haneda, M. ; Ochimizu, H. ; Tsukune, A. ; Okano, S. ; Ohtsuka, N. ; Sunayama, M. ; Sakai, H. ; Suzuki, T. ; Kitada, H. ; Amari, S. ; Tabira, T. ; Matsuyama, H. ; Shimizu, N. ; Futatsugi, T. ; Sugii, T.
Author_Institution
Fujitsu Lab. Ltd., Tokyo
fYear
2007
fDate
10-12 Dec. 2007
Firstpage
513
Lastpage
516
Abstract
We successfully encapsulated Cu wiring with an ultra-thin self-forming barrier consisting of MnO and a bi-layer of MnO/Ta. TDDB test showed that the ILDs lifetime increased by a factor of 100 over that of our control sample. The encapsulated Cu wiring increased EM lifetime by a factor of more than 47. For via chains that are vulnerable to thermal stress, the encapsulated Cu wiring showed no SIV failure. The resistance of the encapsulated Cu wiring was 13% lower than that of the control sample. We expect encapsulated Cu wiring to have greater endurance to the electrical and thermal stresses for use in 32-nm nodes and beyond.
Keywords
copper; encapsulation; thermal stresses; wiring; TDDB test; copper wiring encapsulation; size 32 nm; thermal stress; ultra-thin barriers; Capacitance; Copper; Delay; Dielectrics; Electronic mail; Encapsulation; Laboratories; Thermal stresses; Thickness control; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2007. IEDM 2007. IEEE International
Conference_Location
Washington, DC
Print_ISBN
978-1-4244-1507-6
Electronic_ISBN
978-1-4244-1508-3
Type
conf
DOI
10.1109/IEDM.2007.4418987
Filename
4418987
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