A Unified Compact Model of the Gate Oxide Reliability for Complete Circuit Level Analysis

Author

Lee, Chi-Hwan ; Yang, Gi-Young ; Park, Jin-Kyu ; Park, Young-Kwan ; Kim, Hyung-Wook ; Park, Donggun ; Yoo, Moon-Hyun

Author_Institution

Saumsung Electron. Co. Ltd., Hwasung-City

fYear

2007

fDate

10-12 Dec. 2007

Firstpage

549

Lastpage

552

Abstract

A unified compact model to predict the performance degradation of a circuit due to the electrical gate oxide stress is developed and verified by experimental results. Hot carrier injection (HCI), off-state (OS), and Fowler-Nordheim (FN) degradations can be described by a single formula which models the trap generation over the stress time and voltage. With the proposed model, the propagation delay (tPD) degradation of a ring oscillator is reproduced with the accuracy of more than 90%. It is found that OS plays major role in the tPD degradation rather than HCI, while the component ratio of HCI is getting larger as the frequency increases.

Keywords

MOSFET; semiconductor device models; semiconductor device reliability; Fowler-Nordheim degradation; complete circuit level analysis; electrical gate oxide stress; gate oxide reliability; hot carrier injection; off-state degradation; propagation delay degradation; ring oscillator; trap generation; unified compact model; Circuit analysis; Degradation; Frequency; Hot carrier injection; Human computer interaction; Predictive models; Propagation delay; Ring oscillators; Stress; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2007. IEDM 2007. IEEE International

Conference_Location

Washington, DC

Print_ISBN

978-1-4244-1507-6

Electronic_ISBN

978-1-4244-1508-3

Type

conf

DOI

10.1109/IEDM.2007.4418997

Filename

4418997