Title :
On the equivalence of the sequence pair for rectangle packing to the dimension of partial orders [floorplanning]
Author :
Miyashita, Hiroshi ; Kajitani, Yoji
Author_Institution :
Dept. of Inf. & Media Sci., Univ. of Kitakyushu, Fukuoka, Japan
Abstract :
A sequence pair can be used to represent a set of instances of a floorplanning problem that includes the minimum-area layout. The sequence pair has attracted much attention from CAD researchers because it provides them with an efficient representation of the instances of the floorplanning problem that do not necessarily have a slicing structure. In this respect, the sequence pair is the first representation that can adequately handle realistic requirements. This paper relates the sequence pair to the notion of dimension of partially ordered sets and clarifies its mathematical background.
Keywords :
circuit layout CAD; integrated circuit layout; large scale integration; minimisation; sequences; set theory; CAD; LSI layout; floorplanning problem representation; mathematical background; minimum-area layout; partial order dimensions; partially ordered set dimensions; rectangle packing; sequence pair equivalence; slicing structure; Lapping; Large scale integration; Simulated annealing;
Conference_Titel :
Circuits and Systems, 2002. APCCAS '02. 2002 Asia-Pacific Conference on
Print_ISBN :
0-7803-7690-0
DOI :
10.1109/APCCAS.2002.1115263
