100-MHz CMOS direct digital synthesizer with 10-bit DAC

This paper describes the design and implementation of an integrated direct digital synthesizer with a 10-bit on-chip digital-to-analog converter using a 0.5-μm CMOS technology. The DDS chip operates at 100-MHz maximum clock frequency under 3.3-V supply voltage, with 32-bit frequency, 12-bit phase and 10-bit amplitude resolution. The chip provides sinusoidal, sawtooth, ramp, square and random waveforms with phase and frequency modulation, and power-down function, occupies 12-mm² die area, and dissipates 0.4 W at 100-MHz clock rate. At 25-MHz sinusoidal output, the measured worst-case spurious noise is -65 dBc and the phase noise is -119 dBc/Hz at 100-kHz frequency offset.