Title :
Reliability Considerations in the Design and Fabrication of Polysilicon Fusable Link Prom´s
Author :
Parker, G.H. ; Cornet, J.C. ; Pinter, W.S.
Author_Institution :
Intel Corporation, 3065 Bowers Avenue, Santa Clara, California 95051
Abstract :
This paper describes some of the design and fabrication considerations in a 1024 bit programmable read only memory. The memory element in the PROM is a fusible link consisting of a notched stripe of poly crystalline silicon., A portion of the array is shown in Figure 1 depicting approximately eight cells. Each cell consists of a fusible link and a bipolar transistor. A cross section of the transistor and fuse is shown in Figure 2. Fabrication of the array follows the normal bipolar processing through the emitter step. At that point the poly crystalline silicon is deposited by standard silicon gate MOS techniques. The thickness is nominally 3KÃ
After deposition, the fusible links are delineated with normal photo lithography with a notch width target of 2 microns. By suitable process control, including visual inspection of each wafer, this fuse dimension is routinely achievable. As an aid to width control, a resolution pattern is included on the photo mask. The fuse is then doped to the desired resistivity and the remaining processing again follows a standard flow of contact and metallization steps.
Keywords :
Bipolar transistors; Conductivity; Crystallization; Fabrication; Fuses; Inspection; Lithography; PROM; Process control; Silicon;
Conference_Titel :
Reliability Physics Symposium, 1974. 12th Annual
Conference_Location :
Las Vegas, NV, USA
DOI :
10.1109/IRPS.1974.362633