Title :
Variability Mitigation in Highly Scaled CMOS: Challenges for EDA
Author :
Kahng, Andrew B.
Author_Institution :
Univ. of California, La Jolla
Abstract :
Semiconductor manufacturing technology faces ever-greater business challenges of capital cost and risk, along with ever-greater technical challenges of pitch, mobility, variability, leakage, and reliability. To enable cost-effective continuation of the semiconductor roadmap, electronic design automation (EDA) technology must provide "equivalent scaling" of the performance-power-area envelope, and product-specific design innovation must provide "more than Moore" scaling product value.
Keywords :
CMOS integrated circuits; cost-benefit analysis; design for manufacture; design for testability; electronic design automation; integrated circuit manufacture; integrated circuit modelling; EDA; costs and benefits analysis; design robustness; electronic design automation; equivalent scaling; highly scaled CMOS mitigation; parametric tests; process-aware analysis; product-specific design innovation; semiconductor manufacturing technology; statistical design approaches; CMOS technology; Costs; Design automation; Electronic design automation and methodology; Manufacturing processes; Process design; Productivity; Semiconductor device manufacture; Semiconductor device reliability; Technological innovation;
Conference_Titel :
Electron Devices Meeting, 2007. IEDM 2007. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
978-1-4244-1507-6
Electronic_ISBN :
978-1-4244-1508-3
DOI :
10.1109/IEDM.2007.4419023
