Title :
Adapting JTAG for AC interconnect testing
Author_Institution :
Texas Instruments, Sherman, TX, USA
fDate :
30 Sept.-2 Oct. 2003
Abstract :
The use of AC coupled interconnects to provide communication paths between devices are increasing. The existing IEEE 1149.1 boundary scan standard (JTAG) has limitations that hinder it from being able to effectively test all AC coupled interconnects. This paper describes a simple enhancement to the JTAG architecture enabling it to operate in new modes facilitating AC interconnect testing.
Keywords :
IEEE standards; boundary scan testing; integrated circuit interconnections; integrated circuit testing; logic testing; AC coupled interconnects; AC interconnect testing; IEEE 1149.1 standard; JTAG; boundary scan standard; Capacitors; Circuit testing; Instruments; Integrated circuit interconnections; Intelligent networks; Logic testing; Registers; Resistors; Timing; Voltage;
Conference_Titel :
Test Conference, 2003. Proceedings. ITC 2003. International
Print_ISBN :
0-7803-8106-8
DOI :
10.1109/TEST.2003.1271199
