Building a test environment component in VHDL for an infrared link access protocol (IrLAP) compliant ASIC interface

This paper presents the experiences of the Texas Instruments Bus Solutions ASIC design team in its efforts to create and use a component written in VHDL which was embedded into the test environment for an ASIC. The VHDL component described had to be: dynamically controllable; able to accept and check a wide range of expected results from the ASIC design; able to stimulate the design in every action which was compliant with the IrLAP specification; and able to inject several different kinds of errors into the stimulus flow under user control. Embedding this level of stimulus strength, self-checking and user control was a challenge, but completing the component allowed the ASIC design team to field a fully verified interface which has needed no changes since its release to silicon