Systematic design of programs with sub-word parallelism

Upcoming processor generations increasingly provide instructions for sub-word parallelism. Thus, parallel execution of 2, 4 or 8 instructions (add, sub) or of complex instructions (sum of differences) with an input of 2, 4 or 8 operand pairs becomes possible. The exploitation of sub-word parallelism is still weakly supported by current compilers. To close this gap we present an approach to generate programs for processors with sub-word parallelism. To this end we adapt methods from the design of parallel processor arrays. An algorithm representing short term analysis filtering is used to illustrate the approach.