DocumentCode :
2605314
Title :
Implementing boundary scan test strategies
Author :
Hansen, Peter
Author_Institution :
Teradyne Inc., Boston, MA, USA
fYear :
1990
fDate :
17-21 Sep 1990
Firstpage :
325
Lastpage :
329
Abstract :
Board-level boundary scan testing, focusing largely on the boundary scan EXTEST mode for structural testing of interconnects between boundary scan devices on a board and testing of conventional, nonscan components which cannot be accessed using traditional in-circuit or cluster test techniques, is dealt with. Strategies and test-nail placement for implementing various types of boundary scan testing are detailed. The strategies discussed are virtual interconnect, virtual in circuit, standard cluster testing, and virtual cluster testing. It is shown that, where restricted physical access hampers in-circuit or cluster testing, virtual access provided by boundary scan device leads may offer the means of assuring a comprehensive test. When both physical and virtual access is needed, this requirement must be taken into account during board design and factored into board layout to ensure successful implementation of the test
Keywords :
automatic test equipment; automatic testing; printed circuit testing; ATE; EXTEST; board layout; boundary scan test; nonscan components; standard cluster testing; structural testing; test-nail placement; virtual cluster testing; virtual in-circuit testing; virtual interconnect; Application specific integrated circuits; Automatic testing; Design for testability; Fault detection; Manufacturing; Monopoly; Pins; Silicon; Standards development; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
AUTOTESTCON '90. IEEE Systems Readiness Technology Conference. 'Advancing Mission Accomplishment', Conference Record.
Conference_Location :
San Antonio, TX
Type :
conf
DOI :
10.1109/AUTEST.1990.111531
Filename :
111531
Link To Document :
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