• DocumentCode
    2605497
  • Title

    A Novel Resistance Memory with High Scalability and Nanosecond Switching

  • Author

    Aratani, K. ; Ohba, K. ; Mizuguchi, T. ; Yasuda, S. ; Shiimoto, T. ; Tsushima, T. ; Sone, T. ; Endo, K. ; Kouchiyama, A. ; Sasaki, S. ; Maesaka, A. ; Yamada, N. ; Narisawa, H.

  • Author_Institution
    Sony Corp., Atsugi
  • fYear
    2007
  • fDate
    10-12 Dec. 2007
  • Firstpage
    783
  • Lastpage
    786
  • Abstract
    We report a novel nonvolatile dual-layered electrolytic resistance memory composed of a conductive Cu ion activated layer and a thin insulator for the first time. An ON/OFF mechanism of this new type memory is postulated as follows: Cu ions pierce through the insulator layer by applied electric field, the ions form a Cu conductive bridge in the insulator layer, and this bridge dissolves back to the ion activated layer when the field is reversed. The 4 kbit memory array with 1T-1R cell structure was fabricated based on 180 nm CMOS process. Set/reset pulses were 5 ns, 110 muA and 1 ns, 125 muA, respectively. Those conditions provide large set/reset resistance ratio of over 2 orders of magnitude and satisfactory retention. Essential characteristics for high capacity memories including superb scalability down to 20 nmphi, sufficient endurance up to 107 cycles and preliminary data for 4-level memory are also presented. These characteristics promise the memory being the next generation high capacity nonvolatile memory even before the scaling limitation of flash memories is encountered.
  • Keywords
    CMOS memory circuits; electrolytes; flash memories; CMOS process; conductive ion activated layer; current 110 muA; current 125 muA; dual-layered electrolytic resistance memory; flash memories; nanosecond switching; nonvolatile memory; set-reset resistance ratio; size 180 nm; storage capacity 4 Kbit; time 1 ns; time 5 ns; Bridges; Dielectrics and electrical insulation; Electric resistance; Flash memory; Laboratories; Nonvolatile memory; Resistance heating; Scalability; Solid state circuits; Tellurium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 2007. IEDM 2007. IEEE International
  • Conference_Location
    Washington, DC
  • Print_ISBN
    978-1-4244-1507-6
  • Electronic_ISBN
    978-1-4244-1508-3
  • Type

    conf

  • DOI
    10.1109/IEDM.2007.4419064
  • Filename
    4419064