Title :
10-Gb/s BM-CDR Circuit With Synchronous Data Output for Optical Networks
Author :
Runxiang Yu ; Proietti, Roberto ; Shuang Yin ; Kurumida, Junya ; Yoo, S.J.B.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of California at Davis, Davis, CA, USA
Abstract :
This letter presents a 10-Gb/s burst-mode clock and data recovery (BM-CDR) circuit based on an analog phase-picking method. The experiment demonstrates that the proposed BM-CDR circuit is able to align the BM data to a local clock with a phase alignment accuracy of ±π/4, a 25-ns latency and zero bit loss. The circuit further resamples the aligned data using the local clock for jitter reduction. The experiment shows error-free operation of the BM-CDR circuit for burst-mode data packets with various phase delays.
Keywords :
SONET; clock and data recovery circuits; delays; jitter; optical losses; passive optical networks; BM-CDR circuit; analog phase-picking method; bit rate 10 Gbit/s; burst-mode clock-and-data recovery circuit; burst-mode data packets; error-free operation; jitter reduction; local clock; optical networks; phase alignment accuracy; phase delays; synchronous data output; time 25 ns; zero bit loss; Band pass filters; Bit error rate; Clocks; Delay; Field programmable gate arrays; Mixers; Synchronization; Bit synchronization; burst mode; clock and data recovery; multiphase clock;
Journal_Title :
Photonics Technology Letters, IEEE
DOI :
10.1109/LPT.2013.2242461
