Atomically precise silicon device fabrication

Author

Simmons, Michelle Y. ; Ruess, Frank J. ; Pok, Wilson ; Thompson, Daniel L. ; Füchsle, Martin ; Scappucci, Giordano ; Reusch, Thilo C.G. ; Goh, Kuan-Eng Johnson ; Schofield, Steven R. ; Weber, Bent ; Oberbeck, Lars ; Hamilton, Alex R. ; Ratto, Fulvio

Author_Institution

Sch. of Phys., Univ. of New South Wales, Sydney, NSW

fYear

2007

fDate

2-5 Aug. 2007

Firstpage

903

Lastpage

906

Abstract

An important driving force behind the microelectronics industry is the ability to pack ever more features onto a silicon chip, by continually miniaturising the individual components. However, after 2015 there is no known technological route to reduce devices below 10 nm. We demonstrate a complete fabrication strategy towards atomic-scale device fabrication in silicon using phosphorus as a dopant in combination with scanning probe lithography and high purity, low temperature crystal growth. A major advantage of this strategy is the ability to investigate the role of dopant placement and atomically controlled growth on electronic device operation.

Keywords

CMOS integrated circuits; elemental semiconductors; lithography; phosphorus; semiconductor device measurement; silicon; CMOS; Si; atomic-scale device fabrication; electronic device operation; low temperature crystal growth; microelectronics industry; phosphorus; scanning probe lithography; semiconductor device measurement; silicon chip; silicon device fabrication; Atomic layer deposition; Australia; Electronics industry; Fabrication; Lithography; MOSFETs; Probes; Silicon devices; Temperature; Threshold voltage; CMOS; Doping; semiconductor device fabrication; semiconductor device measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Nanotechnology, 2007. IEEE-NANO 2007. 7th IEEE Conference on

Conference_Location

Hong Kong

Print_ISBN

978-1-4244-0607-4

Electronic_ISBN

978-1-4244-0608-1

Type

conf

DOI

10.1109/NANO.2007.4601329

Filename

4601329