DocumentCode :
2606881
Title :
Silicon-to-silicon wafer bonding with gold as intermediate layer
Author :
Nai, S.M.L. ; Wei, J. ; Lim, P.C. ; Wong, C.K.
Author_Institution :
Singapore Inst. of Manuf. Technol., Singapore
fYear :
2003
fDate :
10-12 Dec. 2003
Firstpage :
119
Lastpage :
124
Abstract :
In this study, eutectic bonding process between two 4-inch, p-type silicon wafers has been successfully achieved. A gold pattern of varying height is firstly deposited on one silicon wafer prior to bonding. To further understand the eutectic bonding process, the effects of bonding temperature and gold height are investigated. When studying the effect of bonding temperature, the gold height is kept constant at 1.00 μm while the bonding temperature is varied from 375 to 475°C. It is found that bonding temperature of 400°C yielded the most satisfactory results, in terms of bonding efficiency, bond strength and interfacial integrity. Moreover, when studying the effect of gold height, the bonding temperature is kept at the optimized temperature of 400°C, with gold height varying from 0.20 to 1.40 μm. It is found that gold height of 1.00 μm yielded the best results.
Keywords :
gold; micromechanical devices; silicon; wafer bonding; 375 to 475 C; MEMS; Si-Au; Si-Si; bond strength; bonding efficiency; bonding temperature; eutectic bonding; gold height; gold intermediate layer; interfacial integrity; optimized process parameters; optimized temperature; p-type wafers; silicon-to-silicon wafer bonding; Bonding processes; Degradation; Gold; Manufacturing processes; Microelectromechanical systems; Microelectronics; Microfluidics; Silicon; Temperature; Wafer bonding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology, 2003 5th Conference (EPTC 2003)
Print_ISBN :
0-7803-8205-6
Type :
conf
DOI :
10.1109/EPTC.2003.1271501
Filename :
1271501
Link To Document :
بازگشت