Title :
Double Level Metallurgy Defect Study
Author :
Gregoritsch, A.J.
Author_Institution :
IBM General Technology Division, Essex Junction, Vermont 05452
Abstract :
A double level metallurgy test chip having purposely induced nonrandom quartz insulation defects (cracks and holes) is used to study the behavior of the defects under accelerated temperature/voltage stress conditions. Data obtained from this stress is analyzed and used to calculate activation energies for an Arrhenius - voltage dependent model.
Keywords :
Acceleration; Insulation testing; Life estimation; Silicon; Sputter etching; Stress; Surface cracks; Temperature; Vehicles; Voltage;
Conference_Titel :
Reliability Physics Symposium, 1978. 16th Annual
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/IRPS.1978.362814
