Title :
Some Package Reliability Implications of Current Trends in Large Scale Silicon Integrated Circuits
Author_Institution :
Bell Telephone Laboratories, Inc., Allentown, Pennsylvania 18103. (215) 439-7991
Abstract :
Increasing scale of integration has tended to change the focus of integrated circuit packaging from low cost to high electrical and thermal performance and improved reliability. Today´s high-speed, densely-packed LSI chips pose some new packaging reliability challenges. These are explored briefly.
Keywords :
Chip scale packaging; Costs; Hazards; Integrated circuit packaging; Integrated circuit reliability; Integrated circuit yield; Large scale integration; Logic; Packaging machines; Silicon;
Conference_Titel :
Reliability Physics Symposium, 1978. 16th Annual
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/IRPS.1978.362832
