A 3V-125 MHz CMOS continuous-time filter

Author

Zele, Rajesh H. ; Lee, Sang-Soo ; Allstot, David J.

Author_Institution

Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA

fYear

1993

fDate

3-6 May 1993

Firstpage

1164

Abstract

A low-voltage high-frequency CMOS fully-differential filtering technique is presented. The low internal voltage characteristic of current-mode circuits allows the operation at power supply voltages as low as 3 V with high dynamic range. The integrator time constant is determined by a MOSFET small-signal transconductance and an additional noncritical MOSFET gate capacitance. For ladder filters derived from doubly-terminated LC prototypes, HSPICE (simulation program with IC emphasis) simulations predict a 3-dB bandwidth of 125 MHz for a three-pole lowpass filter. Power dissipation is 6 mW/pole with a 3-V power supply

Keywords

CMOS analogue integrated circuits; SPICE; circuit analysis computing; continuous time filters; integrating circuits; ladder filters; 125 MHz; 3 V; CMOS continuous-time filter; HSPICE; MOSFET small-signal transconductance; current-mode circuits; doubly-terminated LC prototypes; dynamic range; fully-differential filtering technique; integrator time constant; ladder filters; low internal voltage characteristic; noncritical MOSFET gate capacitance; power dissipation; power supply voltages; three-pole lowpass filter; CMOS technology; Current mode circuits; Dynamic range; Filtering; Filters; Integrated circuit modeling; Low voltage; MOSFET circuits; Power supplies; Predictive models;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on

Conference_Location

Chicago, IL

Print_ISBN

0-7803-1281-3

Type

conf

DOI

10.1109/ISCAS.1993.393934

Filename

393934