Title :
Design for reliability (DFR) methodology for electronic packaging assemblies
Author :
Pang, John H L ; Low, T.H. ; Xiong, B.S. ; Che, F.
Author_Institution :
Sch. of Mech. & Production Eng., Nanyang Technol. Univ., Singapore
Abstract :
Design for reliability requires knowledge based in materials testing and modeling, finite element modeling and simulation, failure mechanism and life prediction and reliability tests for validation. A comprehensive mechanics characterization of electronic solders such as Sn/Pb and Pb-free solders has been established. Examples of conventional 2D and 3D Finite Element Analysis is provided for Thermal Cycling analysis of elastic-plastic-creep analysis of solder joints. The combined effect of modeling viscoelastic underfill and viscoplastic solder is reported for thermal cycling (TC) and thermal shock loading (TS). Two global-local modeling techniques for board-level analysis was calibrated. The global-local 3D modeling techniques are global-local submodeling (GLS) and global-local-beam (GLB) methods.
Keywords :
Young´s modulus; circuit reliability; creep; fatigue; finite element analysis; lead alloys; life testing; reflow soldering; solders; surface mount technology; tensile strength; thermal management (packaging); thermal shock; tin alloys; viscoelasticity; viscoplasticity; yield stress; SnPb; Young´s modulus; board-level analysis; design for reliability methodology; elastic-plastic-creep analysis; electronic packaging assemblies; electronic solders; failure mechanism; finite element modeling; global-local modeling techniques; global-local submodeling; global-local-beam methods; life prediction; materials modeling; materials testing; reliability tests; solder joints; solder reflow; thermal cycling analysis; thermal shock loading; viscoelastic underfill; viscoplastic solder; yield stress; Assembly; Electronics packaging; Failure analysis; Finite element methods; Life testing; Materials reliability; Materials testing; Predictive models; Thermal loading; Tin;
Conference_Titel :
Electronics Packaging Technology, 2003 5th Conference (EPTC 2003)
Print_ISBN :
0-7803-8205-6
DOI :
10.1109/EPTC.2003.1271567
