DocumentCode :
2608355
Title :
Gate current in stacked dielectrics for advanced FLASH EEPROM cells
Author :
Driussi, F. ; Marcuzzi, S. ; Palestri, P. ; Selmi, L.
Author_Institution :
DIEGM, Udine Univ., Italy
fYear :
2005
fDate :
12-16 Sept. 2005
Firstpage :
317
Lastpage :
320
Abstract :
This paper presents a simulation study of the gate current through stacked dielectrics of interest for advanced nonvolatile memory (NVM) cells possibly employing high-k insulators to engineer the tunnel barrier. Program, retention and read disturb conditions are analyzed. The impact of modeling approximations on the predictions of the programming gate current in Fowler-Nordheim (FN) and channel hot electron (CHE) injection regimes is critically discussed. Comparison with a reference SiO2 device allows us to identify some of the possible advantages and limitations of these stacks for future NVM.
Keywords :
flash memories; high-k dielectric thin films; hot carriers; Fowler-Nordheim regime; advanced FLASH EEPROM cells; channel hot electron; high-k insulators; nonvolatile memory; programming gate current; stacked dielectrics; tunnel barrier engineering; Channel hot electron injection; Charge carrier processes; Dielectric materials; Dielectrics and electrical insulation; EPROM; Nonvolatile memory; Potential energy; Predictive models; Stress; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference, 2005. ESSDERC 2005. Proceedings of 35th European
Print_ISBN :
0-7803-9203-5
Type :
conf
DOI :
10.1109/ESSDER.2005.1546649
Filename :
1546649
Link To Document :
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