Title :
Quantum boolean circuit is 1-testable
Author :
Chou, Yao-Hsin ; Tsai, I-Ming ; Kuo, Sy-Yen
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
Abstract :
Recently, a systematic procedure is proposed to derive a minimum space quantum circuit for a given classical logic with the generalized quantum Toffoli gate which is universal in classical boolean logic. Since quantum computation is reversible, we can use this property to build quantum iterative logic array (QILA). QILA can be easily tested in constant time (C-testable) if stuck-at fault model is assumed. In this paper, we apply Hadamard and general CCN gates on QILA circuits to make them 1-testable. As a result, for quantum boolean circuits, the number of test patterns is independent of both the size of the array and the length of the inputs.
Keywords :
Boolean functions; fault simulation; logic arrays; logic testing; quantum gates; 1-testable quantum boolean circuit; CCN gate; CNOT; Hadamard gate; QILA; cell fault model; controlled NOT gate; generalized quantum Toffoli gate; quantum NOT; quantum computation; quantum iterative logic array; quantum reversible circuits; stuck-at fault model; Boolean functions; Circuit faults; Circuit testing; Logic arrays; Logic circuits; Logic testing; Nanotechnology; Quantum computing; Semiconductor device manufacture; Space technology;
Conference_Titel :
Nanotechnology, 2007. IEEE-NANO 2007. 7th IEEE Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-0607-4
Electronic_ISBN :
978-1-4244-0608-1
DOI :
10.1109/NANO.2007.4601419
