DocumentCode :
2608683
Title :
Design of a low-cost 10 Gb/s chip-to-chip optical interconnect
Author :
Hashim, Aeffendi ; Bamiedakis, Nikolaos ; Hao, Ying ; Penty, Richard V. ; White, Ian H.
Author_Institution :
Dept. of Eng., Univ. of Cambridge, Cambridge, UK
fYear :
2010
fDate :
5-7 July 2010
Firstpage :
1
Lastpage :
4
Abstract :
The design of a low-cost chip-to-chip optical interconnect is presented. A ray tracing model is used to investigate the sensitivity of the optical coupling efficiency to misalignments of the optical components. Estimation of the power budget predicts operation at 10 Gb/s with a noise margin of 6.3 dB.
Keywords :
optical couplers; optical design techniques; optical interconnections; optical noise; ray tracing; bit rate 10 Gbit/s; low-cost chip-to-chip optical interconnect; noise margin; optical components; optical coupling; power budget; ray tracing; Couplings; Integrated optics; Optical coupling; Optical interconnections; Optical sensors; Optical waveguides; Vertical cavity surface emitting lasers; optical coupling efficiency; optical interconnections; polymer waveguide; ray tracing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Photonics (ICP), 2010 International Conference on
Conference_Location :
Langkawi, Kedah
Print_ISBN :
978-1-4244-7186-7
Type :
conf
DOI :
10.1109/ICP.2010.5604391
Filename :
5604391
Link To Document :
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