Title :
Modeling the valuation process of silicon intellectual property in the semiconductor industry
Author :
Hung, C.L. ; Su, Y.H. ; Cheng, Alfred L -P
Author_Institution :
Nat. Chi Nan Univ., Nantou
Abstract :
The complexity of IC (integrated circuit) design increases as semiconductor fabrication miniaturizes. Assembly of the reusable basic components of the IC design process has become valuable in accelerating development and marketing of new IC applications. As a result, the idea of SIP (silicon intellectual property) has emerged to meet this demand. The purpose of this paper is to develop a SIP valuation model. However, assessing such intangible assets cost high and have a time-consuming negotiation process to safeguard performance. After intensive interviews with SIP providers, we model a SIP valuation process, which incorporates with quality signals, links to the SIP infomediaries, and augments with the industry dynamics. The results are further suggested to support with Internet SIP malls, which are installed to take the advantages of multimedia interface and real-time archive for facilitating the SIP valuation processes.
Keywords :
electronics industry; industrial property; integrated circuit design; Internet SIP malls; SIP valuation model; assembly; industry dynamics; integrated circuit design; multimedia interface; semiconductor fabrication; semiconductor industry; silicon intellectual property; Acceleration; Application specific integrated circuits; Assembly; Cost accounting; Electronics industry; Fabrication; Intellectual property; Process design; Signal processing; Silicon; Contracting; Semiconductor; Silicon Intellectual Property; Valuation;
Conference_Titel :
Industrial Engineering and Engineering Management, 2007 IEEE International Conference on
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-1529-8
Electronic_ISBN :
978-1-4244-1529-8
DOI :
10.1109/IEEM.2007.4419258
