Title :
Crosstalk-driven placement based on genetic algorithms
Author :
Yoshikawa, Masaya ; Terai, Hidekazu
Author_Institution :
VLSI Center, Ritsumeikan Univ., Kyoto, Japan
Abstract :
Deep-Sub-Micron (DSM) technologies of 0.18 micron and below enable the integration of logical circuits having more than 10 million gates. In such a DSM technology, it´s important to consider improving crosstalk noise at initial phase of layout design. In this paper, we proposed a novel crosstalk-driven placement algorithm. The proposed algorithm based on genetic algorithm (GA) has a two-level hierarchical structure. For selection control, new objective functions are introduced for improving crosstalk noise, reducing power consumption, improving interconnection delay and dispersing wire congestion. Studies on floor planning and cell placement have been reported as being applications of GA to the LSI layout problem. However, no studies have ever seen the effect of applying GA in consideration of power, delay and congestion. Results show improvement of 6.7% for crosstalk noise on average.
Keywords :
circuit layout CAD; genetic algorithms; integrated circuit interconnections; integrated circuit layout; integrated circuit noise; large scale integration; Deep-Sub-Micron technologies; LSI layout design; cell placement; crosstalk noise; floor planning; genetic algorithm; integrated circuit layout; Algorithm design and analysis; Crosstalk; Delay; Energy consumption; Genetic algorithms; Integrated circuit interconnections; Integrated circuit noise; Large scale integration; Routing; Wire;
Conference_Titel :
Computational Intelligence for Measurement Systems and Applications, 2004. CIMSA. 2004 IEEE International Conference on
Print_ISBN :
0-7803-8341-9
DOI :
10.1109/CIMSA.2004.1397233