DocumentCode :
260924
Title :
An architecture for real-time hardware co-simulation of edge detection in image processing using Prewitt edge operator
Author :
Pham-Minh-Luan Nguyen ; Jae-Hyun Cho ; Sang Bock Cho
Author_Institution :
Sch. of Electr. Eng., Univ. of Ulsan, Ulsan, South Korea
fYear :
2014
fDate :
15-18 Jan. 2014
Firstpage :
1
Lastpage :
2
Abstract :
The edge detection algorithm usually applies in the first step of image process. This paper focused about edge detection algorithm implementing on FPGA using advanced design tool Xilinx System Generator. We proposed new edge detection image design for hardware co-simulation, applied Prewitt operator in design. Atlys kit is employed for hardware/software implementation. The cost-efficient hardware co-simulation is adopted to evaluate the real-time performance of an edge detection algorithm.
Keywords :
edge detection; field programmable gate arrays; hardware-software codesign; logic design; Atlys kit; FPGA; Prewitt edge operator; Xilinx system generator; advanced design tool; edge detection algorithm; image processing; real-time cost-efficient hardware cosimulation; Algorithm design and analysis; Field programmable gate arrays; Generators; Hardware; Image edge detection; Real-time systems; Software algorithms; Matlab Simulink; Prewitt edge detector; System Generator (SysGen); edge detection; image processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Information and Communications (ICEIC), 2014 International Conference on
Conference_Location :
Kota Kinabalu
Type :
conf
DOI :
10.1109/ELINFOCOM.2014.6914387
Filename :
6914387
Link To Document :
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