Study on GPU-accelerated extraction of interconnects parasitic using CUDA and MPI

Author

Xu, Xiaoyu ; Liu, Guoqiang ; Qu, Hui ; Xu, Wei ; Zhang, Yang

Author_Institution

Inst. of Electr. Eng., Chinese Acad. of Sci., Beijing, China

fYear

2010

fDate

9-12 May 2010

Firstpage

1

Lastpage

1

Abstract

Parallel computation is application-oriented, particularly for the GPU (Graphics Processing Unit) with the inherent parallelism. This paper shows the architecture of a GPU cluster based on MPI (Message Passing Interface) and CUDA (Compute Unified Device Architecture). Results show that the acceleration ratio is obviously improved but the acceleration effect seems decelerated in large-scale GPU cluster. The parallel algorithm is mainly focused on task partitioning sparse matrix-vector multiplications (SpVM) in GPUs.

Keywords

matrix multiplication; message passing; microprocessor chips; parallel architectures; sparse matrices; CUDA; GPU cluster architecture; GPU-accelerated extraction; MPI; acceleration effect; acceleration ratio; compute unified device architecture; graphics processing unit; interconnects parasitic; large-scale GPU cluster; message passing interface; parallel algorithm; parallel computation; sparse matrix-vector multiplication; task partitioning; Acceleration; Computer applications; Computer architecture; Computer interfaces; Concurrent computing; Graphics; Large-scale systems; Message passing; Parallel algorithms; Parallel processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Electromagnetic Field Computation (CEFC), 2010 14th Biennial IEEE Conference on

Conference_Location

Chicago, IL

Print_ISBN

978-1-4244-7059-4

Type

conf

DOI

10.1109/CEFC.2010.5481435

Filename

5481435