Title :
Implementation method for voting of neural networks
Author :
Qian, Huang ; Qilun, Zheng ; Wenhao, Fan
Author_Institution :
Electr. & Commun. Coll., South China Univ. of Sci. & Technol., Guangzhou, China
Abstract :
In this paper, four types of voting schemes generally adopted in competition neural networks has been compared in their rationality, integrity and maneuverability. A novel hardware design approach especially for the most advanced Nash voting scheme is presented. The proposed method simplifies the circuit construction by changing multiplication operations into logarithm operations. The circuit is experimentally measured with PSPICE.
Keywords :
SPICE; analogue integrated circuits; integrated circuit design; neural chips; neural net architecture; pattern classification; unsupervised learning; PSPICE; advanced Nash voting; analogue integrated circuit design; circuit construction; competition neural network voting scheme; logarithm operations; Analog circuits; Artificial neural networks; Biology computing; Buildings; Computer architecture; Computer networks; Hardware; Multi-layer neural network; Neural networks; Voting;
Conference_Titel :
Computational Intelligence for Measurement Systems and Applications, 2004. CIMSA. 2004 IEEE International Conference on
Print_ISBN :
0-7803-8341-9
DOI :
10.1109/CIMSA.2004.1397240
